SH7125_08 Datasheet, PDF (78/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 4 Clock Pulse Generator (CPG)
Table 4.1 shows the operating clock for each module.
Table 4.1 Operating Clock for Each Module
Operating Clock
Internal clock (Iφ)
Bus clock (Bφ)
Operating Module
CPU
UBC
ROM
RAM

Operating Clock
Peripheral clock (Pφ)
MTU2 clock (MPφ)
Operating Module
POE
SCI
A/D
CMT
WDT
MTU2
4.2 Input/Output Pins
Table 4.2 shows the CPG pin configuration.
Table 4.2 Pin Configuration
Pin Name
Abbr.
Crystal input/output XTAL
pins
EXTAL
(clock input pins)
I/O
Output
Input
Description
Connects a crystal resonator.
Connects a crystal resonator or an external clock.
Rev. 4.00 Jul. 25, 2008 Page 58 of 750
REJ09B0243-0400