SH7125_08 Datasheet, PDF (444/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 12 Serial Communication Interface (SCI)
Initial
Bit
Bit Name value R/W Description
5
ORER
0
R/(W)* Overrun Error
Indicates that an overrun error occurred during
reception, causing abnormal termination.
0: Indicates that reception is in progress or was
completed successfully*¹
[Clearing conditions]
• By a power-on reset or in standby mode
• When 0 is written to ORER after reading ORER =
1
1: Indicates that an overrun error occurred during
reception*²
[Setting condition]
• When the next serial reception is completed while
RDRF = 1
Notes: 1. The ORER flag is not affected and retains
its previous value when the RE bit in
SCSCR is cleared to 0.
2. The receive data prior to the overrun error
is retained in SCRDR, and the data
received subsequently is lost. Subsequent
serial reception cannot be continued while
the ORER flag is set to 1.
Rev. 4.00 Jul. 25, 2008 Page 424 of 750
REJ09B0243-0400