SH7125_08 Datasheet, PDF (349/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Multi-Function Timer Pulse Unit 2 (MTU2)
TGF Flag Setting Timing in Case of Input Capture: Figures 9.101 and 9.102 show the timing
for setting of the TGF flag in TSR on input capture, and TGI interrupt request signal timing.
MPφ, Pφ
Input capture
signal
TCNT
N
TGR
N
TGF flag
TGI interrupt
Figure 9.101 TGI Interrupt Timing (Input Capture) (Channels 0 to 4)
MPφ, Pφ
Input capture
signal
TCNT
N
TGR
N
TGF flag
TGI interrupt
Figure 9.102 TGI Interrupt Timing (Input Capture) (Channel 5)
Rev. 4.00 Jul. 25, 2008 Page 329 of 750
REJ09B0243-0400