SH7125_08 Datasheet, PDF (612/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 17 Flash Memory
Bit
6 to 0
Initial
Bit Name Value
TDA[6:0] All 0
R/W Description
R/W Transfer Destination Address
These bits specify the download start address. A value
from H'02 to H'04 can be set to specify the download
start address in on-chip RAM in 2-kbyte units.
A value H'00, H'01, or H'05 to H'7F cannot be set. If
such a value is set, the TDER bit (bit 7) in this register
is set to 1 to prevent download from being executed.
H'02: Download start address is set to H'FFFFA000
H'03: Download start address is set to H'FFFFA800
H'04: Download start address is set to H'FFFFB000
H'00, H'01, H'05 to H'7F: Setting prohibited when
downloading by the SCO bit
with user program mode. If
this value is set, the TDER bit
(bit 7) is set to 1 to abort the
download processing. When
not using user program mode,
setting H'00 to the TDA is no
problem.
17.4.3 Programming/Erasing Interface Parameters
The programming/erasing interface parameters specify the operating frequency, user branch
destination address, storage place for program data, programming destination address, and erase
block and exchanges the processing result for the downloaded on-chip program. This parameter
uses the general registers of the CPU (R4, R5, and R0) or the on-chip RAM area. The initial value
is undefined.
At download all CPU registers are stored, and at initialization or when the on-chip program is
executed, CPU registers except for R0 are stored. The return value of the processing result is
written in R0. Since the stack area is used for storing the registers or as a work area, the stack area
must be saved at the processing start. (The maximum size of a stack area to be used is 128 bytes.)
Rev. 4.00 Jul. 25, 2008 Page 592 of 750
REJ09B0243-0400