SH7125_08 Datasheet, PDF (582/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 16 I/O Ports
• PBDRL (SH7124)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
PB5
DR
-
PB3
DR
-
PB1
DR
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R R/W R R/W R R/W R
Initial
Bit
Bit Name Value R/W Description
15 to 6 —
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
5
PB5DR 0
R/W See table 16.4.
4
—
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
3
PB3DR 0
R/W See table 16.4.
2
—
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
1
PB1DR 0
R/W See table 16.4.
0
—
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Table 16.4 Port B Data Register (PBDR) Read/Write Operations
• PBDRH Bit 0 and PBDRL Bits 5 and 3 to 1
PBIOR Pin Function Read
Write
0
General input Pin state
Can write to PBDRH and PBDRL, but it has no
effect on pin state
Other than
general input
Pin state
Can write to PBDRH and PBDRL, but it has no
effect on pin state
1
General output PBDRH or Value written is output from pin
PBDRL value
Other than
PBDRH or Can write to PBDRH and PBDRL, but it has no
general output PBDRL value effect on pin state
Rev. 4.00 Jul. 25, 2008 Page 562 of 750
REJ09B0243-0400