SH7125_08 Datasheet, PDF (750/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Appendix
Pin Function
Pin State
Reset State
Power-Down State
Type
Pin Name
Power-On Manual
Software
Standby Sleep
Oscillation POE Function
Stop Detected Used
SCI
SCK0 to SCK2
Z
I/O
Z
I/O
I/O
I/O
RXD0 to RXD2
Z
I
Z
I
I
I
TXD0 to TXD2
Z
O
O*¹
O
O
O
A/D Converter AN0 to AN7
Z
I
Z
I
I
I
ADTRG
Z
I
Z
I
I
I
I/O Ports
PA0 to PA15
Z
I/O
K*¹
I/O
I/O
I/O
PB1 to PB3,
Z
I/O
K*¹
I/O
I/O
I/O
PB5, PB16
PE0 to PE3
Z
I/O
K*¹
I/O
I/O
Z
PE4 to PE8, PE10 Z
I/O
K*¹
I/O
I/O
I/O
PE9, PE11 to PE15 Z
I/O
Z
I/O
Z
Z
PF0 to PF7
Z
I
Z
I
I
I
[Legend]
I:
Input
O: Output
H: High-level output
L:
Low-level output
Z:
High-impedance
K:
Input pins become high-impedance, and output pins retain their state.
Notes: 1. Output pins become high-impedance when the HIZ bit in standby control register 6
(STBCR6) is set to 1.
2. Becomes input during a power-on reset. Pull-up to prevent erroneous operation. Pull-
down with a resistance of at least 1 MΩ as required.
3. Pulled-up inside the LSI when there is no input.
Rev. 4.00 Jul. 25, 2008 Page 730 of 750
REJ09B0243-0400