SH7125_08 Datasheet, PDF (513/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 13 A/D Converter (ADC)
13.4.5 A/D Converter Activation by MTU2
The A/D converter can be independently activated by an A/D conversion request from the interval
timer of the MTU2.
To activate the A/D converter by the MTU2, first set the TRGE bit in the A/D control/status
register (ADCSR) to 1, and then set the A/D trigger select register (ADTSR). After this register
setting has been made, the ADST bit in ADCR is automatically set to 1 when an A/D conversion
request from the interval timer of the MTU2 occurs. The timing from setting of the ADST bit until
the start of A/D conversion is the same as when 1 is written to the ADST bit by software.
13.4.6 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGE bit in the A/D control/status register
(ADCSR) is set to 1 while the TRGS3 to TRGS0 bits in the A/D trigger select register_0
(ADTSR_0) is set to external trigger input, external trigger input is enabled at the ADTRG pin. A
falling edge of the ADTRG pin sets the ADST bit to 1 in ADCR, starting A/D conversion. Other
operations, in both single and scan modes, are the same as when the ADST bit has been set to 1 by
software. Figure 13.3 shows the timing.
CK
ADTRG
External trigger
signal
ADST
A/D conversion
Figure 13.3 External Trigger Input Timing
Rev. 4.00 Jul. 25, 2008 Page 493 of 750
REJ09B0243-0400