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| SH7125_08 Datasheet, PDF (723/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family | |||
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Register
Abbreviation
Power-on reset
PADRL
Initialized
PAIORL
Initialized
PACRL4
Initialized
PACRL3
Initialized
PACRL2
Initialized
PACRL1
Initialized
PAPRL
Initialized
PBDRH
Initialized
PBDRL
Initialized
PBIORH
Initialized
PBIORL
Initialized
PBCRH1
Initialized
PBCRL2
Initialized
PBCRL1
Initialized
PBPRH
Initialized
PBPRL
Initialized
PEDRL
Initialized
PEIORL
Initialized
PECRL4
Initialized
PECRL3
Initialized
PECRL2
Initialized
PECRL1
Initialized
PEPRL
Initialized
IFCR
Initialized
PFDRL
FRQCR
Initialized
Initialized*1
STBCR1
Initialized
STBCR2
Initialized
STBCR3
Initialized
STBCR4
Initialized
Manual reset
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Software
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Module
Standby






























Section 20 List of Registers
Sleep
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Module
I/O
PFC
I/O
PFC
I/O
PFC
I/O
PFC
I/O
CPG
Power-down
modes
Rev. 4.00 Jul. 25, 2008 Page 703 of 750
REJ09B0243-0400
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