SH7125_08 Datasheet, PDF (559/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 15 Pin Function Controller (PFC)
15.1.5 Port E I/O Register L (PEIORL)
PEIORL is a 16-bit readable/writable register that is used to set the pins on port E as inputs or
outputs. PE15IOR to PE0IOR correspond to pins PE15 to PE0 (names of multiplexed pins are
here given as port names and pin numbers alone). PEIORL is enabled when the port E pins are
functioning as general-purpose inputs/outputs (PE15 to PE0), and the TIOC pin is functioning as
inputs/outputs of MTU2. In other states, PEIORL is disabled.
A given pin on port E will be an output pin if the corresponding bit in PEIORL is set to 1, and an
input pin if the bit is cleared to 0.
However, bits 7 to 4 of PEIORL are disabled in SH7124.
The initial value of PEIORL is H'0000.
Bit: 15
PE15
IOR
Initial value: 0
R/W: R/W
14
PE14
IOR
0
R/W
13
PE13
IOR
0
R/W
12
PE12
IOR
0
R/W
11
PE11
IOR
0
R/W
10
PE10
IOR
0
R/W
9
PE9
IOR
0
R/W
8
PE8
IOR
0
R/W
7
PE7
IOR
0
R/W
6
PE6
IOR
0
R/W
5
PE5
IOR
0
R/W
4
PE4
IOR
0
R/W
3
PE3
IOR
0
R/W
2
PE2
IOR
0
R/W
1
PE1
IOR
0
R/W
0
PE0
IOR
0
R/W
15.1.6 Port E Control Registers L1 to L4 (PECRL1 to PECRL4)
PECRL1 to PECRL4, are 16-bit readable/writable registers that are used to select the functions of
the multiplexed pins on port E.
SH7125:
• Port E Control Register L4 (PECRL4)
Bit: 15 14 13 12 11 10 9
8
7
-
PE15 PE15 PE15
MD2 MD1 MD0
-
PE14 PE14 PE14
MD2 MD1 MD0
-
Initial value: 0
0
0
0
0
0
0
0
0
R/W: R R/W R/W R/W R R/W R/W R/W R
6
5
4
3
2
1
0
-
PE13 PE13
MD1 MD0
-
PE12 PE12 PE12
MD2 MD1 MD0
0
0
0
0
0
0
0
R R/W R/W R R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 4.00 Jul. 25, 2008 Page 539 of 750
REJ09B0243-0400