SH7125_08 Datasheet, PDF (515/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 13 A/D Converter (ADC)
13.5 Interrupt Sources
The A/D converter can generate an A/D conversion end interrupt request. The ADI interrupt can
be enabled by setting the ADIE bit in the A/D control/status register (ADCSR) to 1, or disabled by
clearing the ADIE bit to 0.
Table 13.6 A/D Converter Interrupt Source
Name
ADI0
ADI1
Interrupt Source
A/D_0 conversion completed
A/D_1 conversion completed
Interrupt Source Flag
ADF in ADCSR_0
ADF in ADCSR_1
Rev. 4.00 Jul. 25, 2008 Page 495 of 750
REJ09B0243-0400