SH7125_08 Datasheet, PDF (326/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Multi-Function Timer Pulse Unit 2 (MTU2)
Skipping counter 3ACNT 0
1
2
3
0
1
2
3
0
Skipping counter 4VCNT
0
1
2
3
0
1
2
3
Buffer transfer-enabled period
(T3AEN is set to 1)
Buffer transfer-enabled period
(T4VEN is set to 1)
Buffer transfer-enabled period
(T3AEN and T4VEN are set to 1)
Note: * The skipping count is set to three.
Figure 9.72 Relationship between Bits T3AEN and T4VEN in TITCR and Buffer Transfer-
Enabled Period
Rev. 4.00 Jul. 25, 2008 Page 306 of 750
REJ09B0243-0400