SH7125_08 Datasheet, PDF (687/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 19 Power-Down Modes
19.3.4 Standby Control Register 4 (STBCR4)
STBCR4 is an 8-bit readable/writable register that controls the operation of modules in power-
down mode.
Bit: 7
6
5
4
-
MSTP MSTP
22
21
-
Initial value: 1
1
1
1
R/W: R/W R/W R/W R
3
2
1
0
-
-
MSTP MSTP
17
16
1
1
1
1
R R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
7

1
R/W Reserved
This bit is always read as 1. The write value should
always be 1.
6
MSTP22 1
R/W Module Stop Bit 22
When this bit is set to 1, the supply of the clock to the
MTU2 is halted.
0: MTU2 operates
1: Clock supply to MTU2 halted
5
MSTP21 1
R/W Module Stop Bit 21
When this bit is set to 1, the supply of the clock to the
CMT is halted.
0: CMT operates
1: Clock supply to CMT halted
4, 3

All 1
R Reserved
These bits are always read as 1. The write value should
always be 1.
2

1
R/W Reserved
This bit is always read as 1. The write value should
always be 1.
1
MSTP17 1
R/W Module Stop Bit 17
When this bit is set to 1, the supply of the clock to the
A/D_1 is halted.
0: A/D_1 operates
1: Clock supply to A/D_1 halted
Rev. 4.00 Jul. 25, 2008 Page 667 of 750
REJ09B0243-0400