SH7125_08 Datasheet, PDF (314/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Multi-Function Timer Pulse Unit 2 (MTU2)
TGRA_3
TCDR
Bit WRE = 1
Synchronous clearing
TGRB_3
TCNT_3
(MTU2)
TCNT_4
(MTU2)
TDDR
H'0000
Positive phase
Negative phase
Output waveform is active-low.
Initial value output is suppressed.
Figure 9.61 Example of Synchronous Clearing in Interval Tb at Trough
(Timing (11) in Figure 9.56; Bit WRE of TWCR is 1)
Rev. 4.00 Jul. 25, 2008 Page 294 of 750
REJ09B0243-0400