SH7125_08 Datasheet, PDF (611/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 17 Flash Memory
(5) Flash Transfer Destination Address Register (FTDAR)
FTDAR specifies the on-chip RAM address to which the on-chip program is downloaded.
Make settings for FTDAR before writing 1 to the SCO bit in FCCS. The initial value is H'00.
Bit: 7
6
TDER
Initial value: 0
0
R/W: R/W R/W
5
0
R/W
4
3
2
TDA[6:0]
0
0
0
R/W R/W R/W
1
0
R/W
0
0
R/W
Initial
Bit
Bit Name Value
7
TDER
0
R/W Description
R/W Transfer Destination Address Setting Error
This bit is set to 1 when there is an error in the
download start address set by bits 6 to 0 (TDA6 to
TDA0). Whether the address setting is erroneous or not
is tested by checking whether the setting of TDA6 to
TDA0 is between the range of H'02 to H'04 after setting
the SCO bit in FCCS to 1 and performing download.
Before setting the SCO bit to 1 be sure to set the
FTDAR value between H'02 to H'04 as well as clearing
this bit to 0.
0: Setting of TDA6 to TDA0 is normal
1: Setting of TDER and TDA6 to TDA0 is H'00 to H'01
and H'05 to H'FF and download has been aborted
Rev. 4.00 Jul. 25, 2008 Page 591 of 750
REJ09B0243-0400