SH7125_08 Datasheet, PDF (684/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 19 Power-Down Modes
19.3.1 Standby Control Register 1 (STBCR1)
STBCR1 is an 8-bit readable/writable register that specifies the state of the power-down mode.
Bit: 7
6
5
4
3
2
1
0
STBY -
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R
R
R
R
R
R
R
Initial
Bit
Bit Name Value R/W
7
STBY
0
R/W
6 to 0 
All 0
R
Description
Standby
Specifies transition to software standby mode.
0: Executing SLEEP instruction makes this LSI
sleep mode
1: Executing SLEEP instruction makes this LSI
software standby mode
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 4.00 Jul. 25, 2008 Page 664 of 750
REJ09B0243-0400