SH7125_08 Datasheet, PDF (694/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 19 Power-Down Modes
19.6 Module Standby Mode
19.6.1 Transition to Module Standby Mode
Setting the MSTP bits in the standby control registers (STBCR2 to STBCR5) to 1 halts the supply
of clocks to the corresponding on-chip peripheral modules. This function can be used to reduce the
power consumption in normal mode.
Do not access registers of an on-chip peripheral module, which has been set to enter module
standby mode. For details on the states of on-chip peripheral module registers in module standby
mode, refer to section 20.3, Register States in Each Operating Mode.
19.6.2 Canceling Module Standby Function
The module standby function can be canceled by clearing the MSTP bits in STBCR2 to STBCR5
to 0. The module standby function can be canceled by a power-on reset for modules whose MSTP
bit has an initial value of 0.
19.7 Usage Note
19.7.1 Current Consumption while Waiting for Oscillation to be Stabilized
The current consumption while waiting for oscillation to be stabilized is higher than that while
oscillation is stabilized.
19.7.2 Executing the SLEEP Instruction
Apply either of the following measures before executing the SLEEP instruction to initiate the
transition to sleep mode or software standby mode.
Measure A: Stop the generation of interrupts from on-chip peripheral modules, IRQ interrupts, and
the NMI interrupt before executing the SLEEP instruction.
Measure B: Change the value in FRQCR to the initial value, H’36DB, and then dummy-read
FRQCR twice before executing the SLEEP instruction.
Rev. 4.00 Jul. 25, 2008 Page 674 of 750
REJ09B0243-0400