SH7125_08 Datasheet, PDF (696/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 20 List of Registers
20.1 Register Address Table (In the Order from Lower Addresses)
Access sizes are indicated with the number of bits. Access states are indicated with the number of
specified reference clock states. These values are those at 8-bit access (B), 16-bit access (W), or
32-bit access (L).
Note: Access to undefined or reserved addresses is prohibited. Correct operation cannot be
guaranteed if these addresses are accessed.
Register Name
Serial mode register_0
Bit rate register_0
Serial control register_0
Transmit data register_0
Serial status register_0
Receive data register_0
Serial direction control register_0
Serial port register_0
Serial mode register_1
Bit rate register_1
Serial control register_1
Transmit data register_1
Serial status register_1
Receive data register_1
Serial direction control register_1
Serial port register_1
Serial mode register_2
Bit rate register_2
Serial control register_2
Transmit data register_2
Serial status register_2
Receive data register_2
Serial direction control register_2
Serial port register_2
Number of
Abbreviation Bits
Address
SCSMR_0 8
H'FFFFC000
SCBRR_0 8
H'FFFFC002
SCSCR_0 8
H'FFFFC004
SCTDR_0 8
H'FFFFC006
SCSSR_0 8
H'FFFFC008
SCRDR_0 8
H'FFFFC00A
SCSDCR_0 8
H'FFFFC00C
SCSPTR_0 8
H'FFFFC00E
SCSMR_1 8
H'FFFFC080
SCBRR_1 8
H'FFFFC082
SCSCR_1 8
H'FFFFC084
SCTDR_1 8
H'FFFFC086
SCSSR_1 8
H'FFFFC088
SCRDR_1 8
H'FFFFC08A
SCSDCR_1 8
H'FFFFC08C
SCSPTR_1 8
H'FFFFC08E
SCSMR_2 8
H'FFFFC100
SCBRR_2 8
H'FFFFC102
SCSCR_2 8
H'FFFFC104
SCTDR_2 8
H'FFFFC106
SCSSR_2 8
H'FFFFC108
SCRDR_2 8
H'FFFFC10A
SCSDCR_2 8
H'FFFFC10C
SCSPTR_2 8
H'FFFFC10E
Module
SCI
(Channel 0)
SCI
(Channel 1)
SCI
(Channel 2)
Access Size
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Number of Access
States
Pφ reference
B: 2
Pφ reference
B: 2
Pφ reference
B: 2
Rev. 4.00 Jul. 25, 2008 Page 676 of 750
REJ09B0243-0400