SH7125_08 Datasheet, PDF (511/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 13 A/D Converter (ADC)
A/D conversion time (t_CONV)
A/D conversion start Analog input
delay time(tD) sampling time(tSPL)
Write cycle
A/D synchronization time
(2 states) (Up to 6 states)
Pφ
Address
Internal write
signal
Analog input
sampling
signal
A/D converter
ADST write timing
Idle state
Sample-and-hold A/D conversion
ADF
End of A/D conversion
Figure 13.2 A/D Conversion Timing
Rev. 4.00 Jul. 25, 2008 Page 491 of 750
REJ09B0243-0400