English
Language : 

HD6473032F16 Datasheet, PDF (765/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
TOER—Timer Output Enable Register
Appendix B Internal I/O Register
H'90 ITU (all channels)
Bit
7
—
Initial value
1
Read/Write
—
6
5
4
3
2
1
0
—
EXB4 EXA4 EB3
EB4
EA4
EA3
1
1
1
1
1
1
1
—
R/W
R/W R/W
R/W
R/W R/W
Master enable TIOCA3
0 TIOCA3 output is disabled regardless of TIOR3, TMDR, and TFCR settings
1 TIOCA3 is enabled for output according to TIOR3, TMDR, and TFCR settings
Master enable TIOCA4
0 TIOCA 4 output is disabled regardless of TIOR4, TMDR, and TFCR settings
1 TIOCA 4 is enabled for output according to TIOR4, TMDR, and TFCR settings
Master enable TIOCB4
0 TIOCB4 output is disabled regardless of TIOR4 and TFCR settings
1 TIOCB4 is enabled for output according to TIOR4 and TFCR settings
Master enable TIOCB3
0 TIOCB3 output is disabled regardless of TIOR3 and TFCR settings
1 TIOCB3 is enabled for output according to TIOR3 and TFCR settings
Master enable TOCXA4
0 TOCXA4 output is disabled regardless of TFCR settings
1 TOCXA4 is enabled for output according to TFCR settings
Master enable TOCXB4
0 TOCXB4 output is disabled regardless of TFCR settings
1 TOCXB4 is enabled for output according to TFCR settings
Rev. 3.00 Mar 21, 2006 page 735 of 814
REJ09B0302-0300