HD6473032F16 Datasheet, PDF (669/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 21 Electrical Characteristics
Table 21.7 Timing of On-Chip Supporting Modules
Conditions: V_CC = 5.0 V ±10%, AV_CC = 5.0 V ±10%, V_REF = 4.5 V to AV_CC,
V_SS = AV_SS = 0 V, φ = 2 MHz to 25 MHz, T_a = –20°C to +75°C
Item
DMAC
ITU
SCI
Ports and
TPC
DREQ setup time
DREQ hold time
TEND delay time 1
TEND delay time 2
Timer output delay time
Timer input setup time
Timer clock input setup time
Timer clock
pulse width
Single edge
Both edges
Input clock
cycle
Asynchronous
Synchronous
Input clock rise time
Input clock fall time
Input clock pulse width
Transmit data delay time
Receive data setup time
(synchronous)
Receive data Clock input
hold time
(synchronous)
Clock output
Output data delay time
Input data setup time
Input data hold time
Symbol
tDRQS
tDRQH
tTED1
tTED2
tTOCD
tTICS
tTCKS
tTCKWH
tTCKWL
tSCYC
tSCYC
tSCKr
tSCKf
tSCKW
tTXD
tRXS
tRXH
tRXH
tPWD
tPRS
tPRH
Conditions
Min
Max
20
—
10
—
—
50
—
50
—
50
40
—
40
—
1.5
—
2.5
—
4
—
6
—
—
1.5
—
1.5
0.4
0.6
—
100
100
—
100
—
0
—
—
50
50
—
50
—
Unit
ns
ns
tcyc
tscyc
tcyc
tscyc
ns
ns
Test
Conditions
Figure 21.16
Figure 21.24,
Figure 21.25
Figure 21.20
Figure 21.21
Figure 21.22
Figure 21.23
Figure 21.19
Rev. 3.00 Mar 21, 2006 page 639 of 814
REJ09B0302-0300