HD6473032F16 Datasheet, PDF (400/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 10 16-Bit Integrated Timer Unit (ITU)
• Complementary PWM mode
The buffer register value is transferred to the general register when TCNT3 and TCNT4
change counting direction. This occurs at the following two times:
 When TCNT3 compare matches GRA3
 When TCNT4 underflows
• Reset-synchronized PWM mode
The buffer register value is transferred to the general register at compare match A3.
Sample Buffering Setup Procedure: Figure 10.48 shows a sample buffering setup procedure.
Buffering
Select general register functions ¹
Set buffer bits
2
1. Set TIOR to select the output compare or
input capture function of the general
registers.
2. Set bits BFA3, BFA4, BFB3, and BFB4 in
TFCR to select buffering of the required
general registers.
3. Set the STR bits to 1 in TSTR to start the
timer counters.
Start counters
3
Buffered operation
Figure 10.48 Buffering Setup Procedure (Example)
Rev. 3.00 Mar 21, 2006 page 370 of 814
REJ09B0302-0300