HD6473032F16 Datasheet, PDF (694/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix A Instruction Set
Mnemonic
Operation
Addressing Mode and
Instruction Length (bytes)
Condition Code
No. of
States^*1
DEC.L #1, ERd
DEC.L #2, ERd
DAS.Rd
MULXU. B Rs, Rd
MULXU. W Rs, ERd
MULXS. B Rs, Rd
MULXS. W Rs, ERd
DIVXU. B Rs, Rd
DIVXU. W Rs, ERd
DIVXS. B Rs, Rd
DIVXS. W Rs, ERd
CMP.B #xx:8, Rd
CMP.B Rs, Rd
CMP.W #xx:16, Rd
CMP.W Rs, Rd
CMP.L #xx:32, ERd
CMP.L ERs, ERd
L ERd32–1 → ERd32
2
L ERd32–2 → ERd32
2
B Rd8 decimal adjust
2
→ Rd8
B Rd8 × Rs8 → Rd16
2
(unsigned multiplication)
W Rd16 × Rs16 → ERd32
2
(unsigned multiplication)
B Rd8 × Rs8 → Rd16
4
(signed multiplication)
W Rd16 × Rs16 → ERd32
4
(signed multiplication)
B Rd16 ÷ Rs8 → Rd16
2
(RdH: remainder,
RdL: quotient)
(unsigned division)
W ERd32 ÷ Rs16 → ERd32
2
(Ed: remainder,
Rd: quotient)
(unsigned division)
B Rd16 ÷ Rs8 → Rd16
4
(RdH: remainder,
RdL: quotient)
(signed division)
W ERd32 ÷ Rs16 → ERd32
4
(Ed: remainder,
Rd: quotient)
(signed division)
B Rd8–#xx:8
B Rd8–Rs8
W Rd16–#xx:16
W Rd16–Rs16
L ERd32–#xx:32
L ERd32–ERs32
2
2
4
2
6
2
I HNZVC
——
——
—*
—2
—2
*— 2
— — — — — — 14
— — — — — — 22
——
— — 16
——
— — 24
— — (6) (7) — — 14
— — (6) (7) — — 22
— — (8) (7) — — 16
— — (8) (7) — — 24
—
2
—
2
— (1)
4
— (1)
2
— (2)
4
— (2)
2
Rev. 3.00 Mar 21, 2006 page 664 of 814
REJ09B0302-0300