HD6473032F16 Datasheet, PDF (462/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 12 Watchdog Timer
12.3.3 Timing of Setting of Overflow Flag (OVF)
Figure 12.6 shows the timing of setting of the OVF flag in TCSR. The OVF flag is set to 1 when
TCNT overflows. At the same time, a reset signal is generated in watchdog timer operation, or an
interval timer interrupt is generated in interval timer operation.
φ
TCNT
H'FF
H'00
Overflow signal
OVF
Figure 12.6 Timing of Setting of OVF
Rev. 3.00 Mar 21, 2006 page 432 of 814
REJ09B0302-0300