HD6473032F16 Datasheet, PDF (190/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 7 Refresh Controller
2CAS and 2WE Modes: The CAS/WE bit in RFSHCR can select two control modes for 16-bit-
wide DRAM: one using UCAS and LCAS; the other using UW and LW. These DRAM pins
correspond to H8/3052BF pins as shown in table 7.6.
Table 7.6 DRAM Pins and H8/3052BF Pins
H8/3052BF Pin
HWR
LWR
RD
CS3
CAS/WE = 0 (2WE Mode)
UW
LW
CAS
RAS
DRAM Pin
CAS/WE = 1 (2CAS Mode)
UCAS
LCAS
WE
RAS
Figure 7.5 (1) shows the interface timing for 2WE DRAM. Figure 7.5 (2) shows the interface
timing for 2CAS DRAM.
Read cycle
Write cycle*
Refresh cycle
φ
Address
bus
CS ₃
(RAS)
RD
(CAS)
HWR
(UW)
LWR
(LW)
RFSH
Row
Column
Row
Column
Area 3 top address
AS
Note: * 16-bit access
Figure 7.5 DRAM Control Signal Output Timing (1) (2WE Mode)
Rev. 3.00 Mar 21, 2006 page 160 of 814
REJ09B0302-0300