HD6473032F16 Datasheet, PDF (558/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 15 A/D Converter
Bits 2 to 0—Channel Select 2 to 0 (CH2 to CH0): These bits and the SCAN bit select the analog
input channels. Clear the ADST bit to 0 before changing the channel selection.
Group
Selection
CH2
0
1
Channel Selection
CH1
CH0
0
0
1
1
0
1
0
0
1
1
0
1
Single Mode
AN0 (Initial value)
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Description
Scan Mode
AN0
AN0, AN1
AN0 to AN2
AN0 to AN3
AN4
AN4, AN5
AN4 to AN6
AN4 to AN7
15.2.3 A/D Control Register (ADCR)
Bit
7
6
5
4
3
2
1
0
TRGE
—
—
—
—
—
—
—
Initial value
0
1
1
1
1
1
1
0
Read/Write
R/W
—
—
—
—
—
—
—
Reserved bits
Trigger enable
Enables or disables external triggering of A/D conversion
Reserved bit
Must not be set to 1
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion. ADCR is initialized to H'7E by a reset and in standby mode.
Bit 7—Trigger Enable (TRGE): Enables or disables external triggering of A/D conversion.
Bit 7: TRGE
0
1
Description
A/D conversion cannot be externally triggered
(Initial value)
A/D conversion starts at the falling edge of the external trigger signal (ADTRG)
Bits 6 to 1—Reserved: Read-only bits, always read as 1.
Rev. 3.00 Mar 21, 2006 page 528 of 814
REJ09B0302-0300