HD6473032F16 Datasheet, PDF (448/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 11 Programmable Timing Pattern Controller
Example of Non-Overlapping TPC Output (Example of Four-Phase Complementary Non-
Overlapping Output): Figure 11.7 shows an example of the use of TPC output for four-phase
complementary non-overlapping pulse output.
TCNT value
GRB
TCNT
GRA
H'0000
NDRB
95
65
59
56
95
65
Time
PBDR
00
TP₁₅
95 05 65 41 59 50 56 14 95 05 65
Non-overlap margin
TP₁₄
TP₁₃
TP₁₂
TP₁₁
TP₁₀
TP₉
TP₈
Figure 11.7 Non-Overlapping TPC Output Example
(Four-Phase Complementary Non-Overlapping Pulse Output)
This operation example is described below.
• The output trigger ITU channel is set up so that GRA and GRB are output compare registers
and the counter will be cleared by compare match B. The TPC output trigger period is set in
GRB. The non-overlap margin is set in GRA. The IMIEA bit is set to 1 in TIER to enable
IMFA interrupts.
Rev. 3.00 Mar 21, 2006 page 418 of 814
REJ09B0302-0300