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HD6473032F16 Datasheet, PDF (681/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Section 21 Electrical Characteristics
T1
φ
tAD
T2
T3
A23 to A0
AS
CS3
RD (read)
D15 to D0
(read)
HWR, LWR
(write)
D15 to D0
(write)
RFSH
tRAD1
tAS1
tRSD
tWSD
tWDS2
tRAD3
tRP
tSD
tRDS
tRDH
tSD
Figure 21.13 PSRAM Bus Timing (Read/Write): Three-State Access
φ
A23 to A0
AS
CS3, HWR,
LWR, RD
RFSH
T1
T2
tRAD2
T3
tRAD3
Figure 21.14 PSRAM Bus Timing (Refresh Cycle): Three-State Access
Rev. 3.00 Mar 21, 2006 page 651 of 814
REJ09B0302-0300