HD6473032F16 Datasheet, PDF (453/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 12 Watchdog Timer
Section 12 Watchdog Timer
12.1 Overview
The H8/3052BF has an on-chip watchdog timer (WDT). The WDT has two selectable functions: it
can operate as a watchdog timer to supervise system operation, or it can operate as an interval
timer. As a watchdog timer, it generates a reset signal for the chip if a system crash allows the
timer counter (TCNT) to overflow before being rewritten. In interval timer operation, an interval
timer interrupt is requested at each TCNT overflow.
12.1.1 Features
WDT features are listed below.
• Selection of eight counter clock sources
φ/2, φ/32, φ/64, φ/128, φ/256, φ/512, φ/2048, or φ/4096
• Interval timer option
• Timer counter overflow generates a reset signal or interrupt.
The reset signal is generated in watchdog timer operation. An interval timer interrupt is
generated in interval timer operation.
• Watchdog timer reset signal resets the entire chip internally.
The reset signal generated by timer counter overflow during watchdog timer operation resets
the entire chip internally.
With the H8/3052BF, a reset signal cannot be output externally.
Rev. 3.00 Mar 21, 2006 page 423 of 814
REJ09B0302-0300