HD6473032F16 Datasheet, PDF (529/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 14 Smart Card Interface
Bit 2—Smart Card Data Inverter (SINV): Inverts data logic levels. This function is used in
combination with bit 3 to communicate with inverse-convention cards. SINV does not affect the
logic level of the parity bit. For parity settings, see section 14.3.4, Register Settings.
Bit 2: SINV
0
1
Description
Unmodified TDR contents are transmitted
Received data is stored unmodified in RDR
Inverted TDR contents are transmitted
Received data is inverted before storage in RDR
(Initial value)
Bit 1—Reserved: Read-only bit, always read as 1.
Bit 0—Smart Card Interface Mode Select (SMIF): Enables the smart card interface function.
Bit 0: SMIF
0
1
Description
Smart card interface function is disabled
Smart card interface function is enabled
(Initial value)
14.2.2 Serial Status Register (SSR)
The function of SSR bit 4 is modified in the smart card interface. This change also causes a
modification to the setting conditions for bit 2 (TEND).
Bit
Initial value
Read/Write
7
TDRE
1
R/(W)*
6
RDRF
0
R/(W)*
5
ORER
0
R/(W)*
4
ERS
0
R/(W)*
3
PER
0
R/(W)*
2
TEND
1
R
1
MPB
0
R
0
MPBT
0
R/W
Transmit end
Status flag indicating
end of transmission
Error signal status (ERS)
Status flag indicating that an
error signal has been received
Note: * Only 0 can be written, to clear the flag.
Rev. 3.00 Mar 21, 2006 page 499 of 814
REJ09B0302-0300