HD6473032F16 Datasheet, PDF (393/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 10 16-Bit Integrated Timer Unit (ITU)
In complementary PWM mode, TCNT3 and TCNT4 overshoot and undershoot at the transitions
between up-counting and down-counting. The setting conditions for the IMFA bit in channel 3 and
the OVF bit in channel 4 differ from the usual conditions. In buffered operation the buffer transfer
conditions also differ. Timing diagrams are shown in figures 10.37 and 10.38.
TCNT3
N–1
N
N+1
N
N–1
GRA3
IMFA
Buffer transfer
signal (BR to GR)
GR
N
Set to 1
Buffer transfer
Figure 10.37 Overshoot Timing
Flag not set
No buffer transfer
Rev. 3.00 Mar 21, 2006 page 363 of 814
REJ09B0302-0300