HD6473032F16 Datasheet, PDF (744/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix B Internal I/O Register
EBR1—Erase Block Register 1
H'42
Flash memory
Bit
Initial value*
Read/Write
7
EB7
0
R/W*
6
EB6
0
R/W*
5
EB5
0
R/W*
4
EB4
0
R/W*
3
EB3
0
R/W*
2
EB2
0
R/W*
1
EB1
0
R/W*
0
EB1
0
R/W*
Erase block specification bits (1)
0 Erase protection state
1 Erasable state
Note: * The initial value is H'00 in modes 5, 6 and 7 (on-chip ROM enabled). In modes
1, 2, 3, and 4 (on-chip ROM disabled), this register cannot be modified and is
always read as H'FF.
EBR2—Erase Block Register 2
H'43
Flash memory
Bit
Initial value*
Read/Write
7
EB15
0
R/W*
6
EB14
0
R/W*
5
EB13
0
R/W*
4
EB12
0
R/W*
3
EB11
0
R/W*
2
EB10
0
R/W*
1
EB9
0
R/W*
0
EB8
0
R/W*
Erase block specification bits (2)
0 Erase protection state
1 Erasable state
Note: * The initial value is H'00 in modes 5, 6 and 7 (on-chip ROM enabled). In modes
1, 2, 3, and 4 (on-chip ROM disabled), this register cannot be modified and is
always read as H'FF.
Rev. 3.00 Mar 21, 2006 page 714 of 814
REJ09B0302-0300