HD6473032F16 Datasheet, PDF (519/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 13 Serial Communication Interface
13.5 Usage Notes
Note the following points when using the SCI.
TDR Write and TDRE Flag: The TDRE flag in SSR is a status flag indicating the loading of
transmit data from TDR into TSR. The SCI sets the TDRE flag to 1 when it transfers data from
TDR to TSR.
Data can be written into TDR regardless of the state of the TDRE flag. If new data is written in
TDR when the TDRE flag is 0, the old data stored in TDR will be lost because this data has not
yet been transferred to TSR. Before writing transmit data in TDR, be sure to check that the TDRE
flag is set to 1.
Simultaneous Multiple Receive Errors: Table 13.13 indicates the state of SSR status flags when
multiple receive errors occur simultaneously. When an overrun error occurs the RSR contents are
not transferred to RDR, so receive data is lost.
Table 13.13 SSR Status Flags and Transfer of Receive Data
RDRF ORER FER
PER
Receive Data
Transfer
RSR → RDR
1
1
0
0
×
0
0
1
0
O
0
0
0
1
O
1
1
1
0
×
1
1
0
1
×
0
0
1
1
O
1
1
1
1
×
Legend:
O: Receive data is transferred from RSR to RDR.
×: Receive data is not transferred from RSR to RDR.
Receive Errors
Overrun error
Framing error
Parity error
Overrun error + framing error
Overrun error + parity error
Framing error + parity error
Overrun error + framing error + parity error
Break Detection and Processing: Break signals can be detected by reading the RxD pin directly
when a framing error (FER) is detected. In the break state the input from the RxD pin consists of
all 0s, so the FER flag is set and the parity error flag (PER) may also be set. In the break state the
SCI receiver continues to operate, so if the FER flag is cleared to 0 it will be set to 1 again.
Rev. 3.00 Mar 21, 2006 page 489 of 814
REJ09B0302-0300