HD6473032F16 Datasheet, PDF (20/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

6.3 Operation........................................................................................................................... 119
6.3.1 Area Division ....................................................................................................... 119
6.3.2 Chip Select Signals .............................................................................................. 121
6.3.3 Data Bus............................................................................................................... 122
6.3.4 Bus Control Signal Timing .................................................................................. 123
6.3.5 Wait Modes.......................................................................................................... 131
6.3.6 Interconnections with Memory (Example) .......................................................... 137
6.3.7 Bus Arbiter Operation.......................................................................................... 139
6.4 Usage Notes ...................................................................................................................... 142
6.4.1 Connection to Dynamic RAM and Pseudo-Static RAM...................................... 142
6.4.2 Register Write Timing ......................................................................................... 142
6.4.3 BREQ Input Timing............................................................................................. 144
6.4.4 Transition to Software Standby Mode ................................................................. 144
Section 7 Refresh Controller ............................................................................................ 145
7.1 Overview........................................................................................................................... 145
7.1.1 Features................................................................................................................ 145
7.1.2 Block Diagram ..................................................................................................... 147
7.1.3 Pin Configuration................................................................................................. 148
7.1.4 Register Configuration......................................................................................... 148
7.2 Register Descriptions ........................................................................................................ 149
7.2.1 Refresh Control Register (RFSHCR)................................................................... 149
7.2.2 Refresh Timer Control/Status Register (RTMCSR) ............................................ 152
7.2.3 Refresh Timer Counter (RTCNT)........................................................................ 153
7.2.4 Refresh Time Constant Register (RTCOR) ......................................................... 154
7.3 Operation........................................................................................................................... 155
7.3.1 Overview.............................................................................................................. 155
7.3.2 DRAM Refresh Control ....................................................................................... 157
7.3.3 Pseudo-Static RAM Refresh Control ................................................................... 172
7.3.4 Interval Timer ...................................................................................................... 176
7.4 Interrupt Source................................................................................................................. 182
7.5 Usage Notes ...................................................................................................................... 182
Section 8 DMA Controller................................................................................................ 185
8.1 Overview........................................................................................................................... 185
8.1.1 Features................................................................................................................ 185
8.1.2 Block Diagram ..................................................................................................... 186
8.1.3 Functional Overview............................................................................................ 187
8.1.4 Pin Configuration................................................................................................. 189
8.1.5 Register Configuration......................................................................................... 189
Rev. 3.00 Mar 21, 2006 page xviii of xxviii