 English |
|
|
|
|
|
|
|
| HD6473032F16 Datasheet, PDF (674/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series | |||
| |||
| ◁ |
Section 21 Electrical Characteristics
⢠Basic bus cycle: three-state access with one wait state
Figure 21.6 shows the timing of the external three-state access cycle with one wait state
inserted.
Ï
A23 to A0,
CS7 to CS0
AS
RD
(read)
D15 to D0
(read)
HWR, LWR
(write)
D15 to D0
(write)
T1
T2
tCYC
tCH
tCL
tCF
tAD
tcyc
tCR
tASD
tAS1
tACC3
tASD
tACC3
tAS1
tACC1
tPCH
tSD
tAH
tPCH
tSD
tAH
tRDS
tRDH
tASD
tAS1
tWDD
tPCH
tSD
tAH
tWSW1
tWDS1
tWDH
Figure 21.4 Basic Bus Cycle: Two-State Access
Rev. 3.00 Mar 21, 2006 page 644 of 814
REJ09B0302-0300
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese