HD6473032F16 Datasheet, PDF (583/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 17 RAM
17.1.2 Register Configuration
The on-chip RAM is controlled by SYSCR. Table 17.1 gives the address and initial value of
SYSCR.
Table 17.1 System Control Register
Address^*
Name
H'FFF2
System control register
Note: * Lower 16 bits of the address.
Abbreviation R/W
SYSCR
R/W
Initial Value
H'0B
17.2 System Control Register (SYSCR)
Bit
7
6
5
4
3
2
1
0
SSBY STS2 STS1 STS0 UE NMIEG — RAME
Initial value
0
0
0
0
1
0
1
1
Read/Write
R/W
R/W R/W
R/W
R/W
R/W
—
R/W
RAM enable
Enables or
disables
on-chip RAM
Reserved bit
NMI edge select
User bit enable
Standby timer select 2 to 0
Software standby
One function of SYSCR is to enable or disable access to the on-chip RAM. The on-chip RAM is
enabled or disabled by the RAME bit in SYSCR. For details about the other bits, see section 3.3,
System Control Register (SYSCR).
Rev. 3.00 Mar 21, 2006 page 553 of 814
REJ09B0302-0300