HD6473032F16 Datasheet, PDF (628/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 18 ROM
H'00000
EB0
H'01000
EB1
H'02000
EB2
H'03000
EB3
H'04000
EB4
H'05000
EB5
H'06000
EB6
H'07000
EB7
H'08000
Flash memory
This area can be accessed
from both the RAM area
and flash memory area
H'FDF10
H'FE000
H'FEFFF
EB8 to EB15
H'7FFFF
On-chip RAM
H'FFF0F
Figure 18.16 Example of RAM Overlap Operation
Example in which Flash Memory Block Area EB0 is Overlapped
1. Set bits RAMS, RAM2 to RAM0 in RAMCR to 1, 0, 0, 0, to overlap part of RAM onto the
area (EB0) for which real-time programming is required.
2. Real-time programming is performed using the overlapping RAM.
3. After the program data has been confirmed, clear the RAMS bit to release RAM overlap.
4. Write the data written in the overlapping RAM into the flash memory space (EB0).
Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks
regardless of the value of RAM2 to RAM0 (emulation protection). In this state, setting
the P1 or E1 bit in flash memory control register 1 (FLMCR1), or the P2 or E2 bit in
flash memory control register 2 (FLMCR2), will not cause a transition to program
mode or erase mode. When actually programming or erasing a flash memory area, the
RAMS bit should be cleared to 0.
Rev. 3.00 Mar 21, 2006 page 598 of 814
REJ09B0302-0300