HD6473032F16 Datasheet, PDF (649/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 20 Power-Down State
20.2 Register Configuration
The H8/3052BF has a system control register (SYSCR) that controls the power-down state, and a
module standby control register (MSTCR) that controls the module standby function. Table 20.2
summarizes these registers.
Table 20.2 Control Register
Address^* Name
H'FFF2
System control register
H'FF5E
Module standby control register
Note: * Lower 16 bits of the address.
Abbreviation R/W
SYSCR
R/W
MSTCR
R/W
Initial Value
H'0B
H'40
20.2.1 System Control Register (SYSCR)
Bit
7
6
5
4
3
2
1
0
SSBY STS2 STS1 STS0 UE NMIEG — RAME
Initial value
0
0
0
0
1
0
1
1
Read/Write
R/W
R/W R/W R/W R/W R/W
—
R/W
RAM enable
Reserved bit
NMI edge select
User bit enable
Standby timer select 2 to 0
These bits select the
waiting time at exit from
software standby mode
Software standby
Enables transition to
software standby mode
SYSCR is an 8-bit readable/writable register. Bit 7 (SSBY) and bits 6 to 4 (STS2 to STS0) control
the power-down state. For information on the other SYSCR bits, see section 3.3, System Control
Register (SYSCR).
Rev. 3.00 Mar 21, 2006 page 619 of 814
REJ09B0302-0300