HD6473032F16 Datasheet, PDF (303/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 9 I/O Ports
9.9.2 Register Configuration
Table 9.13 summarizes the registers of port 8.
Table 9.13 Port 8 Registers
Address^* Name
H'FFCD
Port 8 data direction
register
H'FFCF
Port 8 data register
Note: * Lower 16 bits of the address.
Abbreviation R/W
P8DDR
W
P8DR
R/W
Initial Value
Mode 1 to 4 Mode 5 to 7
H'F0
H'E0
H'E0
H'E0
Port 8 Data Direction Register (P8DDR)
P8DDR is an 8-bit write-only register that can select input or output for each pin in port 8.
Bit
7
6
5
4
3
2
1
0
—
—
— P8₄DDR P8₃DDR P8₂DDR P8₁DDR P8₀DDR
Modes ^{Initial value 1}
1
1
1
0
0
0
0
1 to 4 _{Read/Write —}
—
—
W
W
W
W
W
Modes ^{Initial value 1}
1
1
0
0
0
0
0
5 to 7 _{Read/Write —}
—
—
W
W
W
W
W
Reserved bits
Port 8 data direction 4 to 0
These bits select input or
output for port 8 pins
• Modes 1 to 6 (Expanded Modes)
When bits in P8DDR bit are set to 1, P8₄ to P8₁ become CS₀ to CS₃ output pins. When bits in
P8DDR are cleared to 0, the corresponding pins become input ports. In modes 1 to 4
(expanded modes with on-chip ROM disabled), following a reset only CS₀ is output. The other
three pins are input ports. In modes 5 and 6 (expanded modes with on-chip ROM enabled),
following a reset all four pins are input ports.
When the refresh controller is enabled, P8₀ is used unconditionally for RFSH output. When the
refresh controller is disabled, P8₀ becomes a generic input/output port according to the P8DDR
setting. For details see table 9.15.
Rev. 3.00 Mar 21, 2006 page 273 of 814
REJ09B0302-0300