HD6473032F16 Datasheet, PDF (208/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 7 Refresh Controller
Contention between RTCNT Write and Increment: If an increment pulse occurs in the T₃ state
of an RTCNT write cycle, writing takes priority and RTCNT is not incremented. See figure 7.21.
φ
Address bus
Internal
write signal
RTCNT
input clock
RTCNT
RTCNT write cycle by CPU
T₁
T₂
T₃
RTCNT address
N
M
Counter write data
Figure 7.21 Contention between RTCNT Write and Increment
Rev. 3.00 Mar 21, 2006 page 178 of 814
REJ09B0302-0300