HD6473032F16 Datasheet, PDF (742/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix B Internal I/O Register
FLMCR1—Flash Memory Control Register 1
H'40
Flash memory
Bit
Initial value*
Read/Write
7
FWE
1
R
6
SWE1
0
R/W*
5
ESU1
0
R/W*
4
PSU1
0
R/W*
3
EV1
0
R/W*
2
PV1
0
R/W*
1
E1
0
R/W*
0
P1
0
R/W*
Program mode 1
0 Program mode cleared
(Initial value)
1 Transition to program mode
Erase mode 1
0 Erase mode cleared (Initial value)
1 Transition to erase mode
Program-verify mode 1
0 Program-verify mode cleared (Initial value)
1 Transition to program-verify mode
Erase-verify mode 1
0 Erase-verify mode cleared (Initial value)
1 Transition to erase-verify mode
Program setup bit 1
0 Program setup cleared
1 Program setup
(Initial value)
Erase setup bit 1
0 Erase setup cleared
1 Erase setup
(Initial value)
Software write enable bit 1
0 Write disabled (Initial value)
1 Write enabled
Flash write enable bit
0 When a low level is input to the FWE pin (hardware protection state)
1 When a high level is input to the FWE pin
Note: * The initial value is H'00 in modes 5, 6, and 7 (on-chip flash memory enabled). In modes 1, 2,
3, and 4 (on-chip flash memory disabled), this register cannot be modified and is always read
as H'FF.
Rev. 3.00 Mar 21, 2006 page 712 of 814
REJ09B0302-0300