HD6473032F16 Datasheet, PDF (447/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 11 Programmable Timing Pattern Controller
11.3.4 Non-Overlapping TPC Output
Sample Setup Procedure for Non-Overlapping TPC Output: Figure 11.6 shows a sample
procedure for setting up non-overlapping TPC output.
Non-overlapping
TPC output
ITU setup
Select GR functions
1
Set GR values
2
Select counting operation
3
Select interrupt requests
4
Port and
TPC setup
ITU setup
Set initial output data
5
Set up TPC output
6
Enable TPC transfer
7
Select TPC transfer trigger
8
Select non-overlapping groups 9
Set next TPC output data
10
Start counter
11
No
Compare match A?
Yes
Set next TPC output value
12
1. Set TIOR to make GRA and GRB
output compare registers (with output
inhibited).
2. Set the TPC output trigger period in
GRB and the non-overlap margin in
GRA.
3. Select the counter clock source with bits
TPSC2 to TPSC0 in TCR. Select the
counter clear source with bits CCLR1
and CCLR0.
4. Enable the IMFA interrupt in TIER. The
DMAC can also be set up to transfer
data to the next data register.
5. Set the initial output values in the DR
bits of the input/output port pins to be
used for TPC output.
6. Set the DDR bits of the input/output port
pins to be used for TPC output to 1.
7. Set the NDER bits of the pins to be
used for TPC output to 1.
8. In TPCR, select the ITU compare match
event to be used as the TPC output
trigger.
9. In TPMR, select the groups that will
operate in non-overlap mode.
10. Set the next TPC output values in the
NDR bits.
11. Set the STR bit to 1 in TSTR to start the
timer counter.
12. At each IMFA interrupt, write the next
output value in the NDR bits.
Figure 11.6 Setup Procedure for Non-Overlapping TPC Output (Example)
Rev. 3.00 Mar 21, 2006 page 417 of 814
REJ09B0302-0300