HD6473032F16 Datasheet, PDF (29/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

21.2.5 Flash Memory Characteristics.............................................................................. 642
21.3 Operational Timing ........................................................................................................... 643
21.3.1 Bus Timing .......................................................................................................... 643
21.3.2 Refresh Controller Bus Timing............................................................................ 647
21.3.3 Control Signal Timing ......................................................................................... 652
21.3.4 Clock Timing ....................................................................................................... 654
21.3.5 TPC and I/O Port Timing..................................................................................... 654
21.3.6 ITU Timing .......................................................................................................... 655
21.3.7 SCI Input/Output Timing ..................................................................................... 656
21.3.8 DMAC Timing..................................................................................................... 657
Appendix A Instruction Set .............................................................................................. 659
A.1 Instruction List .................................................................................................................. 659
A.2 Operation Code Map......................................................................................................... 674
A.3 Number of States Required for Execution ........................................................................ 677
Appendix B Internal I/O Register ................................................................................... 687
B.1 Addresses .......................................................................................................................... 687
B.2 Function ............................................................................................................................ 695
Appendix C I/O Port Block Diagrams........................................................................... 776
C.1 Port 1 Block Diagram ....................................................................................................... 776
C.2 Port 2 Block Diagram ....................................................................................................... 777
C.3 Port 3 Block Diagram ....................................................................................................... 778
C.4 Port 4 Block Diagram ....................................................................................................... 779
C.5 Port 5 Block Diagram ....................................................................................................... 780
C.6 Port 6 Block Diagrams ...................................................................................................... 781
C.7 Port 7 Block Diagrams ...................................................................................................... 785
C.8 Port 8 Block Diagrams ...................................................................................................... 786
C.9 Port 9 Block Diagrams ...................................................................................................... 789
C.10 Port A Block Diagrams ..................................................................................................... 793
C.11 Port B Block Diagrams ..................................................................................................... 797
Appendix D Pin States ....................................................................................................... 801
D.1 Port States in Each Mode .................................................................................................. 801
D.2 Pin States at Reset ............................................................................................................. 804
Appendix E Timing of Transition to and Recovery from
Hardware Standby Mode ........................................................................... 807
E.1 Timing of Transition to Hardware Standby Mode ............................................................ 807
Rev. 3.00 Mar 21, 2006 page xxvii of xxviii