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HD6473032F16 Datasheet, PDF (326/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
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Section 9 I/O Ports
Port B Data Register (PBDR)
PBDR is an 8-bit readable/writable register that stores output data for pins PB7 to PB0. When a bit
in PBDDR is set to 1, if port B is read the value of the corresponding PBDR bit is returned. When
a bit in PBDDR is cleared to 0, if port B is read the corresponding pin level is read.
Bit
Initial value
Read/Write
7
PB 7
0
R/W
6
5
4
3
2
1
0
PB 6
PB 5
PB 4
PB 3
PB 2
PB 1
PB 0
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W
Port B data 7 to 0
These bits store data for port B pins
PBDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Rev. 3.00 Mar 21, 2006 page 296 of 814
REJ09B0302-0300
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