HD6473032F16 Datasheet, PDF (18/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

2.8.6 Reset State............................................................................................................ 55
2.8.7 Power-Down State ............................................................................................... 55
2.9 Basic Operational Timing ................................................................................................. 56
2.9.1 Overview.............................................................................................................. 56
2.9.2 On-Chip Memory Access Timing........................................................................ 56
2.9.3 On-Chip Supporting Module Access Timing....................................................... 57
2.9.4 Access to External Address Space ....................................................................... 58
Section 3 MCU Operating Modes .................................................................................. 59
3.1 Overview........................................................................................................................... 59
3.1.1 Operating Mode Selection ................................................................................... 59
3.1.2 Register Configuration......................................................................................... 60
3.2 Mode Control Register (MDCR)....................................................................................... 60
3.3 System Control Register (SYSCR) ................................................................................... 61
3.4 Operating Mode Descriptions ........................................................................................... 63
3.4.1 Mode 1 ................................................................................................................. 63
3.4.2 Mode 2 ................................................................................................................. 63
3.4.3 Mode 3 ................................................................................................................. 63
3.4.4 Mode 4 ................................................................................................................. 63
3.4.5 Mode 5 ................................................................................................................. 63
3.4.6 Mode 6 ................................................................................................................. 64
3.4.7 Mode 7 ................................................................................................................. 64
3.5 Pin Functions in Each Operating Mode ............................................................................ 64
3.6 Memory Map in Each Operating Mode ............................................................................ 65
Section 4 Exception Handling ......................................................................................... 69
4.1 Overview........................................................................................................................... 69
4.1.1 Exception Handling Types and Priority............................................................... 69
4.1.2 Exception Handling Operation............................................................................. 69
4.1.3 Exception Sources and Vector Table ................................................................... 70
4.2 Reset ................................................................................................................................. 72
4.2.1 Overview.............................................................................................................. 72
4.2.2 Reset Sequence .................................................................................................... 72
4.2.3 Interrupts after Reset............................................................................................ 75
4.3 Interrupts ........................................................................................................................... 76
4.4 Trap Instruction................................................................................................................. 77
4.5 Stack Status after Exception Handling.............................................................................. 77
4.6 Notes on Use of the Stack ................................................................................................. 78
Rev. 3.00 Mar 21, 2006 page xvi of xxviii