HD6473032F16 Datasheet, PDF (632/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 18 ROM
c. In the boot mode, perform FWE pin High/Low switching during reset.
In transition to the boot mode, input FWE = High level and set MD₂ to MD₀ while the RES
input is low. At this time, the FWE and MD₂ to MD₀ inputs must satisfy the mode
programming setup time (t_MDS) relative to the reset clear timing. The mode programming
setup time is necessary for RES reset timing even in transition from the boot mode to
another mode.
In reset during operation, the RES pin must be held at a low level for at least 20 system
clocks.
d. In the user program mode, FWE = High/Low switching is possible regardless of the RES
input.
FWE input switching is also possible during program execution on flash memory.
e. Apply an input to FWE when the program is not running away.
When applying an input to the FWE pin, the program execution state must be supervised
using a watchdog timer, etc.
f. Release FWE pin input only when the SWE1, ESU1, PSU1, EV1, PV1, E1, and P1 bits in
FLMCR1, and the SWE2, ESU2, PSU2, EV2, PV2, E2, and P2 bits in FLMCR2, are
cleared.
Do not erroneously set any of bits SWE1, ESU1, PSU1, EV1, PV1, E1, P1, SWE2, ESU2,
PSU2, EV2, PV2, E2, or P2 when applying or releasing FWE.
4. Do not input a constant high level to the FWE pin.
To prevent erroneous programming/erasing in the event of program runaway, etc., input a high
level to the FWE pin only when programming/erasing flash memory (including flash memory
emulation by RAM). Avoid system configurations that constantly input a high level to the
FWE pin. Handle program runaway, etc. by starting the watchdog timer so that flash memory
is not overprogrammed/overerased even while a high level is input to the FWE pin.
5. Program/erase the flash memory in accordance with the recommended algorithms.
The recommended algorithms can program/erase the flash memory without applying voltage
stress to the device or sacrificing the reliability of the program data.
When setting the PSU1 and ESU1 bits in FLMCR1, or PSU2 and ESU2 bits in FLMCR2 set
the watchdog timer for program runaway, etc.
Accesses to flash memory by means of an MOV instruction, etc., are prohibited while bit
P1/P2 or bit E1/E2 is set.
6. Do not set/clear the SWE bit while a program is executing on flash memory.
Before performing flash memory program execution or data read, clear the SWE bit.
If the SWE bit is set, the flash data can be reprogrammed, but flash memory cannot be
accessed for purposes other than verify (verify during programming/erase).
Rev. 3.00 Mar 21, 2006 page 602 of 814
REJ09B0302-0300