HD6473032F16 Datasheet, PDF (189/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 7 Refresh Controller
Address Multiplexing: Address multiplexing depends on the setting of the M9/M8 bit in
RFSHCR, as described in table 7.5. Figure 7.4 shows the address output timing. Address output is
multiplexed only in area 3.
Table 7.5 Address Multiplexing
Address Pins
A23 to
A10
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Address signals during row
address output
A23 to A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
A10
Address signals M9/M8 = 0 A23 to A9 A9 A16 A15 A14 A13 A12 A11 A10 A0
during column
A10
address output _{M9/M8 = 1 A23 to A18 A17 A16 A15 A14 A13 A12 A11 A10 A0}
A10
φ
Address
bus
A₂₃ to A ₉ , A ₀
A₈ to A ₁
T₁
T₂
T₃
A ₂₃ to A ₉, A ₀
A ₈ to A₁
Row address
a. M9/M8 = 0
A₁₆ to A₉
Column address
T₁
T₂
T₃
φ
Address
bus
A ₂₃ to A₁₀, A ₀
A₉ to A ₁
A ₂₃ to A₁₀, A ₀
A ₉ to A₁
Row address
b. M9/M8 = 1
A₁₈ to A₁₀
Column address
Figure 7.4 Multiplexed Address Output (Example without Wait States)
Rev. 3.00 Mar 21, 2006 page 159 of 814
REJ09B0302-0300