HD6473032F16 Datasheet, PDF (687/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 21 Electrical Characteristics
21.3.8 DMAC Timing
DMAC timing is shown as follows.
• DMAC TEND output timing for 2 state access
Figure 21.24 shows the DMAC TEND output timing for 2 state access.
• DMAC TEND output timing for 3 state access
Figure 21.25 shows the DMAC TEND output timing for 3 state access.
• DMAC DREQ input timing
Figure 21.26 shows DMAC DREQ input timing.
φ
TEND
T₁
t_TED1
T₂
t_TED2
Figure 21.24 DMAC TEND Output Timing for 2 State Access
φ
TEND
T₁
T₂
t_TED1
T₃
t_TED2
Figure 21.25 DMAC TEND Output Timing for 3 State Access
φ
DREQ
t_DRQS t_DRQH
Figure 21.26 DMAC DREQ Input Timing
Rev. 3.00 Mar 21, 2006 page 657 of 814
REJ09B0302-0300