HD6473032F16 Datasheet, PDF (714/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix A Instruction Set
Instruction Mnemonic
Instruction Branch
Stack
Byte Data Word Data Internal
Fetch
Addr. Read Operation Access Access Operation
I
J
K
L
M
N
MOV
MOV.W @(d:24, ERs), Rd 4
1
MOV.W @ERs+, Rd
1
1
2
MOV.W @aa:16, Rd
2
1
MOV.W @aa:24, Rd
3
1
MOV.W Rs, @ERd
1
1
MOV.W Rs, @(d:16, ERd) 2
1
MOV.W Rs, @(d:24, ERd) 4
1
MOV.W Rs, @–ERd
1
1
2
MOV.W Rs, @aa:16
2
1
MOV.W Rs, @aa:24
3
1
MOV.L #xx:32, ERd
3
MOV.L ERs, ERd
1
MOV.L @ERs, ERd
2
2
MOV.L @(d:16, ERs), ERd 3
2
MOV.L @(d:24, ERs), ERd 5
2
MOV.L @ERs+, ERd
2
2
2
MOV.L @aa:16, ERd
3
2
MOV.L @aa:24, ERd
4
2
MOV.L ERs, @ERd
2
2
MOV.L ERs, @(d:16, ERd) 3
2
MOV.L ERs, @(d:24, ERd) 5
2
MOV.L ERs, @–ERd
2
2
2
MOV.L ERs, @aa:16
3
2
MOV.L ERs, @aa:24
4
MOVFPE MOVFPE @aa:16, Rd^*1 2
MOVTPE MOVTPE Rs, @aa:16^*1 2
2
1
1
MULXS MULXS.B Rs, Rd
2
12
MULXS.W Rs, ERd
2
20
MULXU MULXU.B Rs, Rd
1
12
MULXU.W Rs, ERd
1
20
NEG
NEG.B Rd
1
NEG.W Rd
1
NEG.L ERd
1
NOP
NOP
1
Rev. 3.00 Mar 21, 2006 page 684 of 814
REJ09B0302-0300