HD6473032F16 Datasheet, PDF (511/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 13 Serial Communication Interface
operation, the serial clock is output until an overrun error occurs or the RE bit is cleared to 0. For
character-by-character reception, an external clock should be selected as the clock source.
Transmitting and Receiving Data
• SCI Initialization (Synchronous Mode)
Before transmitting or receiving, clear the TE and RE bits to 0 in SCR, then initialize the SCI
as follows.
When changing the communication mode or format, always clear the TE and RE bits to 0
before following the procedure given below. Clearing the TE bit to 0 sets the TDRE flag to 1
and initializes TSR. Clearing the RE bit to 0, however, does not initialize the RDRF, PER,
FER, and ORE flags and RDR, which retain their previous contents.
Figure 13.15 is a sample flowchart for initializing the SCI.
Start of initialization
Clear TE and RE bits
to 0 in SCR
Set RIE, TIE, TEIE, MPIE, ₁
CKE1, and CKE0 bits in SCR
(leaving TE and RE bits
cleared to 0)
Select communication
2
format in SMR
3
Set value in BRR
Wait
1 bit interval
No
elapsed?
Yes
Set TE or RE to 1 in SCR
Set RIE, TIE, TEIE, and 4
MPIE bits as necessary
1. Select the clock source in SCR. Clear the RIE, TIE,
TEIE, MPIE, TE, and RE bits to 0.
2. Select the communication format in SMR.
3. Write the value corresponding to the bit rate in
BRR. This step is not necessary when an external
clock is used.
4. Wait for at least the interval required to transmit or
receive one bit, then set the TE or RE bit to 1 in
SCR. Also set the RIE, TIE, TEIE, and MPIE bits
as necessary. Setting the TE or RE bit enab les the
SCI to use the TxD or RxD pin.
Start transmitting or receiving
Note: In simultaneous transmitting and receiving, the TE and RE bits should be cleared to 0 or set to 1
simultaneously
Figure 13.15 Sample Flowchart for SCI Initialization
Rev. 3.00 Mar 21, 2006 page 481 of 814
REJ09B0302-0300