HD6473032F16 Datasheet, PDF (582/847 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Section 17 RAM
17.1.1 Block Diagram
Figure 17.1 shows a block diagram of the on-chip RAM.
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
Bus interface
SYSCR
H'FDF10*
H'FDF12*
H'FDF11*
H'FDF13*
On-chip RAM
H'FFF0E*
H'FFF0F*
Even addresses
Legend:
SYSCR: System control register
Odd addresses
Note: * This example is of the H8/3052BF operating in mode 7. The lower 20 bits of
the address are shown.
Figure 17.1 RAM Block Diagram
Rev. 3.00 Mar 21, 2006 page 552 of 814
REJ09B0302-0300